unisonic technologies co., ltd U74AC74 cmos ic www.unisonic.com.tw 1 of 6 copyright ? 2012 unisonic technologies co., ltd qw-r502-800.a dual positive-edge-triggered d-type flip-flop with clear and preset ? description the U74AC74 is a dual positive-edge-triggered d-type flip-flop. the preset ( pre ) and clear ( clr ) input can set or reset the output at a low level ,regardless of the level of others inputs .when the pre and clr are inactive(high), data at the data d input meeting the set-up time requirem ents is transferred to the outputs on the positive-going edge of the clock pulse. following the hold-time interval, data d can be changed without affecting the levels at the outputs. ? features * operating voltage rauge: v cc (opr)=2v to 6v. * inputs accept voltages to 6v * max tpd at 10ns of 5v ? ordering information ordering number package packing lead free halogen free U74AC74l-s14-r U74AC74g-s14-r sop-14 tape reel
U74AC74 cmos ic unisonic technologies co., ltd 2 of 6 www.unisonic.com.tw qw-r502-800.a ? pin configuration ? function table (each gate) input output pre clr clk d q q l h x x h l h l x x l h l l x x h h h h h h l h h l l h h h l x q0 q0 ? logic diagram (positive logic)
U74AC74 cmos ic unisonic technologies co., ltd 3 of 6 www.unisonic.com.tw qw-r502-800.a ? absolute maximum rating (t a =25c, unless otherwise specified)(note 1) parameter symbol ratings unit supply voltage v cc -0.5~7 v input voltage v in -0.5~ v cc +0.5 v output voltage(active mode) v out -0.5~v cc +0.5 v input clamp current(v in <0) i ik -20(min) ma output clamp current(v out <0) i ok 20 ma output current i out 50 ma v cc or gnd current i cc 200 ma storage temperature t stg -65 ~ +150 c note 1. the input and output voltage ratings may be exce eded if the input and output cu rrent ratings are observed. 2. absolute maximum ratings are those values be yond which the device could be permanently damaged. absolute maximum ratings are stress ratings only and functional device oper ation is not implied. ? recommended operating comditions parameter symbol test conditions min typ max unit supply voltage v cc 2 6 v input voltage v in 0 5.5 v output voltage v out 0 v cc v high-level input voltage v ih v cc =3v 2.1 v v cc =4.5v 3.15 v cc =5.5v 3.85 lo w -level input voltage v il v cc =3v 0.9 v v cc =4.5v 1.35 v cc =5.5v 1.65 high-level output current i oh v cc =3v -12 ma v cc =4.5v -24 v cc =5.5v -24 lo w -level output current i ol v cc =3v 12 ma v cc =4.5v 24 v cc =5.5v 24 input transition rise or fall rate t/ v 8 ns/v operating temperature t a -40 +85 c ? static characteristics (t a =25c, unless otherwise specified) parameter symbol test conditions min typ max unit high-level output voltage v oh i oh =-50ua v cc =3v 2.9 v v cc =4.5v 4.4 v cc =5.5v 5.4 i oh =-12ma v cc =3v 2.56 i oh =-24ma v cc =4.5v 3.86 v cc =5.5v 4.86 low-level output voltage v ol i ol =-50ua v cc =3v 0.1 v v cc =4.5v 0.1 v cc =5.5v 0.1 i ol =12ma v cc =3v 0.36 i ol =24ma v cc =4.5v 0.36 v cc =5.5v 0.36 input leakage current i i ( leak ) v cc =0v ~ 5.5v, v in =v cc or gnd 0.1 a quiescent supply current i cc v cc = 5.5v, v in =5.5v or gnd i out =0 2 input capacitance c in v cc =3.3v, v in =v cc or gnd 3 pf
U74AC74 cmos ic unisonic technologies co., ltd 4 of 6 www.unisonic.com.tw qw-r502-800.a ? dynamic characteristics t a =25c, unless otherwise specified, input: t r , t f 2.5ns; prr 1mhz parameter symbol test conditions min typ max unit clock frequency f clock v cc =3v0.3v 100 mh z pulse duration tw v cc =3v0.3v pre or clr in low 5.5 ns v cc =3v0.3v, clk 5.5 setup time before clk tsu v cc =3v0.3v, pre or clr inactive 0 ns data 4 hold time ,data after clk th v cc =3v0.3v 0.5 ns clock frequency f clock v cc =5v0.5v 140 mhz pulse duration tw v cc =5v0.5v pre or clr in low 4.5 ns v cc =3v0.3v, clk 4.5 setup time before clk tsu v cc =5v0.5v, pre or clr inactive 0 ns data 3 hold time ,data after clk th v cc =5v0.5v 0.5 ns ? dynamic characteristics (see fig. 1 and fig. 2 for test circuit and waveforms.) parameter symbol test conditions min typ max unit maximum clock f ma x v cc =3v0.3v, c l =50pf, r l =500 ? 100 125 mhz propagation delay from input ( pre or clr ) to output(q or q) t plh v cc =3v0.3v, c l =50pf, r l =500 ? 3.5 8 12 ns t phl 4 10.5 12 propagation delay from input (clk) to output(q or q) t plh v cc =3v0.3v, c l =50pf, r l =500 ? 4.5 8 13.5 ns t phl 3.5 8 14 maximum clock f ma x v cc =5v0.5v 140 160 mhz propagation delay from input ( pre or clr ) to output(q or q) t plh v cc =5v0.5v, c l =50pf, r l =500 ? 2.5 6 9 ns t phl 3 8 9.5 propagation delay from input (clk) to output(q or q) t plh v cc =5v0.5v, c l =50pf, r l =500 ? 3.5 6 10 ns t phl 2.5 6 10 operating characteristics parameter symbol test conditions min typ max unit power dissipation capacitance cpd c l =50p, f=1mhz, v cc =3.3v 45 pf
U74AC74 cmos ic unisonic technologies co., ltd 5 of 6 www.unisonic.com.tw qw-r502-800.a ? test circuit and waveforms from output c l test circuit r l note: c l includes probe and jig capacitance. fig. 1 load circuitry for switching times. fig. 2 propagation delay from input to output and input voltage waveforms.
U74AC74 cmos ic unisonic technologies co., ltd 6 of 6 www.unisonic.com.tw qw-r502-800.a utc assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all utc products described or contained herein. utc products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. the information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice.
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